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由于半导体材料的增益特性具有一定的温度敏感性,使得温度成为影响半导体激光器性能的关键参数之一。对于VCSEL激光器而言,主要包括由周期性半导体材料对组成的P型掺杂分布式布喇格反射镜(distributed Bragg reflector,DBR)、由多量子阱或量子点等增益材料组成的位于中心的发光有源区结构和N型掺杂DBR三部分组成[15],其中P型DBR和发光有源区是热源的主体。对于VCSEL阵列而言,热源数量更多,热源之间的热传导更加复杂,亟需阐明VCSEL阵列的详细产热机理。
以具有4×4个单元的VCSEL阵列为例,结构示意图如图 1所示。器件生长在N型砷化镓(GaAs)衬底上,由P型掺杂DBR(P-DBR)、N型掺杂DBR(N-DBR)、有源区、氧化限制层、P型电极和N型电极组成,DBR之间的有源区光学厚度为激光半波长的整数倍,光输出方向垂直于衬底。对于每个阵列单元而言,根据产热功耗与注入电流关系的不同,又可分为两类热源,其中发光有源区内以线性功耗为主,P-DBR内以2次功耗为主。
图 2中给出了具有M×N个单元的VCSEL阵列2维热网络。其中采用峰值温度来表征相应单元上的温度特性,环境温度T0表征为对地的参考温度。以2维热网络中的单元(i, j)为例,线性功耗Pl, ij和2次功耗Pq, ij均与热阻Rij并联连接。单元(i, j)的温升为Tr, ij=Rij(Pl, ij+Pq, ij)。因此,单元(i, j)的峰值温度Tij可表示为Tij=Tr, ij+T0=Rij(Pl, ij+Pq, ij)+T0。可见,VCSEL阵列的产热机理与各阵列单元上的线性功耗和2次功耗分布密切相关[15]。
下面将通过分析VCSEL阵列各单元上的光学特性和电学特性随温度的依赖关系,阐明热-光反馈和热-电反馈成因,以加深对于VCSEL阵列产热机理的理解。
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考虑到内量子效率ηi(Tij)的温度依赖关系,可进一步表示为[16]:
$\begin{gathered} \eta_{\mathrm{i}}\left(T_{i j}\right)= \\ \frac{q\left[\alpha_{\mathrm{i}}\left(T_{i j}\right)+{\alpha_{\mathrm{m}}}{ }^{\mathrm{T}}\left(T_{i j}\right)+{\alpha_{\mathrm{m}}}{ }^{\mathrm{B}}\left(T_{i j}\right)\right] E_{\mathrm{SE}}\left(T_{i j}\right)}{{\alpha_{\mathrm{m}}}{ }^{\mathrm{T}}\left(T_{i j}\right) E_{\mathrm{l}}\left(T_{i j}\right)} \end{gathered}$
(1) 式中:q是电子电荷;El(Tij)是有源区量子阱势阱材料的禁带宽度;αi(Tij)是内部光损耗率;αmT(Tij)和αmB(Tij) 分别是通过P-DBR和N-DBR的传输损耗率;ESE(Tij)是从不同环境温度下的光-电流(L-I)曲线中提取的斜率效率(slope efficiency, SE)。
单元(i, j)上的光输出功率Po, ij可表示为[17]:
$\begin{gathered} P_{\mathrm{o}, i j}=\frac{\left(I_{\mathrm{b}, i j}-I_{\mathrm{th}, i j}\right) E_{\mathrm{l}}\left(T_{i j}\right) \eta_{\mathrm{i}}\left(T_{i j}\right) {\alpha_{\mathrm{m}}}^{\mathrm{T}}\left(T_{i j}\right)}{q\left[\alpha_{\mathrm{i}}\left(T_{i j}\right)+{\alpha_{\mathrm{m}}}^{\mathrm{T}}\left(T_{i j}\right)+{\alpha_{\mathrm{m}}}^{\mathrm{B}}\left(T_{i j}\right)\right]}, \\ \left(I_{\mathrm{b}, i j}>I_{\mathrm{th}, i j}\right) \end{gathered}$
(2) 式中:Ib, ij为注入电流;Ith, ij为激射阈值电流。此时,VCSEL阵列的总输出光功率Po, s即为各阵列单元上的Po, ij之和。
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考虑到Ib, ij的温度依赖关系,可具体表示为[18]:
$I_{\mathrm{b}, i j}=I_{\mathrm{s}} \exp \left[q\left(V_{\mathrm{b}}-V_{\mathrm{r}, i j}\right)-1\right] /\left(k T_{i j}\right)$
(3) 式中:Is为反向饱和电流;Vb为偏置电压;Vr, ij=Ib, ij × Rs, ij为串联电阻Rs, ij引起的电压降;k为玻尔兹曼常数。同时,Is和Ib, ij都随温度升高而增加[19]。此时,VCSEL阵列的总偏置电流Ib, s为各阵列单元上的Ib, ij之和。
在单元(i, j)上,由Ib, ij流经Rs, ij而产生的2次功耗Pq, ij可表示为[20]:
$P_{\mathrm{q}, i j}=I_{\mathrm{b}, i j}{ }^2 R_{\mathrm{s}, i j}$
(4) 此时,VCSEL阵列总的2次功耗Pq为各阵列单元上Pq, ij之和。
考虑到包括载流子泄漏功耗Pleak, ij、载流子热化功耗Ptherm, ij、内部光学损耗Pabs, ij和自发载流子复合功耗Prec, ij在内的多种功耗机制的联合作用,单元(i, j)上的线性功耗Pl, ij可表示为[16]:
$P_{1, i j}=P_{\mathrm{leak}, i j}+P_{\mathrm{therm}, i j}+P_{\mathrm{abs}, i j}+P_{\mathrm{rec}, i j}$
(5) 与此同时,上述4种功耗还均与注入电流相关:
$P_{\text {leak }, i j}=E_{\mathrm{b}}\left(T_{i j}\right) I_{\mathrm{b}, i j}\left[1-\eta_{\mathrm{i}}\left(T_{i j}\right)\right] / q$
(6) $P_{\text {therm }, i j}=\left[E_{\mathrm{b}}\left(T_{i j}\right)-E_{\mathrm{l}}\left(T_{i j}\right)\right] I_{\mathrm{b}, i j} \eta_{\mathrm{i}}\left(T_{i j}\right) / q$
(7) $\begin{gathered} P_{\mathrm{abs}, i j}= \\ \left\{\begin{array}{l} \frac{E_{\mathrm{l}}\left(T_{i j}\right) \eta_{\mathrm{i}}\left(T_{i j}\right)\left(I_{\mathrm{b}, i j}-I_{\mathrm{th}, i j}\left[\alpha_{\mathrm{i}}\left(T_{i j}\right)+{\alpha_{\mathrm{m}}}{ }^{\mathrm{B}}\left(T_{i j}\right)\right]\right.}{q\left[\alpha_{\mathrm{i}}\left(T_{i j}\right)+{\alpha_{\mathrm{m}}}{ }^{\mathrm{T}}\left(T_{i j}\right)+{\alpha_{\mathrm{m}}}{ }^{\mathrm{B}}\left(T_{i j}\right)\right]}, \\ \quad\quad\left(I_{\mathrm{b}, i j}>I_{\mathrm{th}, i j}\right) \\ 0, \quad\left(I_{\mathrm{b}, i j}<I_{\mathrm{th}, i j}\right) \end{array}\right. \end{gathered}$
(8) $P_{\mathrm{rec}, i j}=\left\{\begin{array}{l} E_{\mathrm{l}}\left(T_{i j}\right) \eta_{\mathrm{i}}\left(T_{i j}\right) I_{\mathrm{th}, i j} / q, \left(I_{\mathrm{b}, i j}>I_{\mathrm{th}, i j}\right) \\ E_{\mathrm{l}}\left(T_{i j}\right) \eta_{\mathrm{i}}\left(T_{i j}\right) I_{\mathrm{b}, i j} / q, \left(I_{\mathrm{b}, i j}<I_{\mathrm{th}, i j}\right) \end{array}\right.$
(9) 式中:Eb(Tij)是有源区量子阱势垒材料的禁带宽度。
此时,VCSEL阵列的总线性功耗Pl, s、总载流子泄漏功耗Pleak, s、总载流子热化功耗Ptherm, s、总内部光学损耗Pabs, s和总自发载流子复合功耗Prec, s分别为Pl, ij、Pleak, ij、Ptherm, ij、Pabs, ij和Prec, ij之和。
由上述分析可知,VCSEL阵列中每个单元均包含线性功耗、2次功耗两类热源,在自加热效应和各单元间热耦合效应的影响下将导致中心单元结温偏高,进而在热-电反馈作用下,中心单元将获得更多的注入电流,产生更多的热;同时在热-光反馈作用下,中心单元内量子效率将迅速下降,使得输出光功率随之迅速减小,而光功率的减小量又会以功耗形式全部转化为热能,进一步增大器件结温。因此,如何在充分考虑VCSEL阵列内部各单元上热-电反馈、热-光反馈影响的基础上建立VCSEL阵列精确热-光-电模型,对于系统掌握VCSEL阵列产热机理,进而精准开展热设计研究具有重要意义。
垂直腔面发射激光器阵列的热设计研究进展
Advances in thermal design of vertical cavity surface emitting laser array
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摘要: 垂直腔面发射激光器(VCSEL)通常采用由小尺寸发光单元并联的2维阵列结构来提高输出光功率、改善激光光束质量,然而随着芯片尺寸不断缩小以及阵列集成度不断提高,由VCSEL单元自身功耗引起的自加热效应及各单元之间的热耦合效应将导致VCSEL阵列结温急剧上升,在热-光-电反馈作用下,将严重制约VCSEL阵列的光学性能及热可靠性,对VCSEL阵列热设计提出了迫切要求。在阐明VCSEL阵列产热机理的基础上,从热-光-电模型建立、热设计方法两方面归纳总结了VCSEL阵列热设计最新进展,并对热设计发展趋势进行了展望。Abstract: Vertical-cavity surface-emitting laser (VCSEL) usually adopt a 2-D array structure with small-sized light-emitting cells in parallel to increase the output optical power and to improve the laser beam quality. However, with the down scaling of the chip size and the increasing of the array integration, the self-heating effect caused by the power dissipation of the VCSEL cell and the thermal coupling effect among VCSEL cells will lead to a sharp increase in the junction temperature of the VCSEL array. Due to the effect of thermal-opto-electro feedback, the optical performance and thermal reliability of the VCSEL array will be limited seriously, which propose urgent requirements for the thermal design of the VCSEL array. Based on the heat generation mechanism of VSCEL array, latest development of VCSEL array thermal design was reviewed in detail from the aspects of thermal-opto-electro modeling and thermal design methodology. The development trend of thermal design in VCSEL array was also prospected.
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Key words:
- lasers /
- 2-D array /
- thermal-opto-electro modeling /
- thermal design
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